@@ -152,23 +152,23 @@ struct spi_struct_t {
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// clang-format off
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static spi_t _spi_bus_array [] = {
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#if CONFIG_IDF_TARGET_ESP32S2
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- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 0 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 1 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 2 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 0 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 1 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 2 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C2
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C3
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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- {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
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+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
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#else
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- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 , false }
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#endif
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};
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// clang-format on
@@ -180,22 +180,22 @@ static spi_t _spi_bus_array[] = {
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static spi_t _spi_bus_array [] = {
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#if CONFIG_IDF_TARGET_ESP32S2
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- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 2 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 2 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C2
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C3
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
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#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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- {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
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+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
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#else
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- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 },
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- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 }
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+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 , false },
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+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 , false }
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#endif
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};
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#endif
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