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‎CHANGELOG.md

+3-2
Original file line numberDiff line numberDiff line change
@@ -9,9 +9,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
99

1010
### Breaking changes
1111

12-
- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
12+
- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`, `Pwm`, `Qei`, `PwmInput`.
1313
Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
14-
Remove `RemapStruct`s. [#462] [#506] [#509]
14+
Remove `RemapStruct`s. [#462] [#506] [#507] [#509]
1515
- Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
1616
- Take `&Clocks` instead of `Clocks` [#498]
1717
- Temporary replace `stm32f1` with `stm32f1-staging` [#503]
@@ -56,6 +56,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
5656
[#503]: https://github.com/stm32-rs/stm32f1xx-hal/pull/503
5757
[#505]: https://github.com/stm32-rs/stm32f1xx-hal/pull/505
5858
[#506]: https://github.com/stm32-rs/stm32f1xx-hal/pull/506
59+
[#507]: https://github.com/stm32-rs/stm32f1xx-hal/pull/507
5960
[#509]: https://github.com/stm32-rs/stm32f1xx-hal/pull/509
6061

6162
## [v0.10.0] - 2022-12-12

‎examples/pwm.rs

+3-8
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,7 @@ use panic_halt as _;
99

1010
use cortex_m::asm;
1111
use cortex_m_rt::entry;
12-
use stm32f1xx_hal::{
13-
pac,
14-
prelude::*,
15-
time::ms,
16-
timer::{Channel, Tim2NoRemap},
17-
};
12+
use stm32f1xx_hal::{pac, prelude::*, time::ms, timer, timer::Channel};
1813

1914
#[entry]
2015
fn main() -> ! {
@@ -36,7 +31,7 @@ fn main() -> ! {
3631
let c3 = gpioa.pa2.into_alternate_push_pull(&mut gpioa.crl);
3732
// If you don't want to use all channels, just leave some out
3833
// let c4 = gpioa.pa3.into_alternate_push_pull(&mut gpioa.crl);
39-
let pins = (c1, c2, c3);
34+
let pins = (c1, c2, c3, &mut afio.mapr);
4035

4136
// TIM3
4237
// let c1 = gpioa.pa6.into_alternate_push_pull(&mut gpioa.crl);
@@ -55,7 +50,7 @@ fn main() -> ! {
5550
// or
5651
let mut pwm = p
5752
.TIM2
58-
.pwm_hz::<Tim2NoRemap, _, _>(pins, &mut afio.mapr, 1.kHz(), &clocks);
53+
.pwm_hz::<timer::tim2::Channels123>(pins, 1.kHz(), &clocks);
5954

6055
// Enable clock on each of the channels
6156
pwm.enable(Channel::C1);

‎examples/pwm_custom.rs

+7-2
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,11 @@
88
use panic_halt as _;
99

1010
use cortex_m::asm;
11-
use stm32f1xx_hal::{pac, prelude::*, timer::Timer};
11+
use stm32f1xx_hal::{
12+
pac,
13+
prelude::*,
14+
timer::{self, Timer},
15+
};
1216

1317
use cortex_m_rt::entry;
1418

@@ -30,7 +34,8 @@ fn main() -> ! {
3034
let p0 = pb4.into_alternate_push_pull(&mut gpiob.crl);
3135
let p1 = gpiob.pb5.into_alternate_push_pull(&mut gpiob.crl);
3236

33-
let pwm = Timer::new(p.TIM3, &clocks).pwm_hz((p0, p1), &mut afio.mapr, 1.kHz());
37+
let pwm = Timer::new(p.TIM3, &clocks)
38+
.pwm_hz::<timer::tim3::Channels12>((p0, p1, &mut afio.mapr), 1.kHz());
3439

3540
let max = pwm.get_max_duty();
3641

‎examples/pwm_input.rs

+4-8
Original file line numberDiff line numberDiff line change
@@ -7,11 +7,7 @@
77
use panic_halt as _;
88

99
use cortex_m_rt::entry;
10-
use stm32f1xx_hal::{
11-
pac,
12-
prelude::*,
13-
timer::{pwm_input::*, Timer},
14-
};
10+
use stm32f1xx_hal::{pac, prelude::*, timer::pwm_input::*};
1511

1612
#[entry]
1713
fn main() -> ! {
@@ -31,11 +27,11 @@ fn main() -> ! {
3127
let (_pa15, _pb3, pb4) = afio.mapr.disable_jtag(gpioa.pa15, gpiob.pb3, gpiob.pb4);
3228
let pb5 = gpiob.pb5;
3329

34-
let pwm_input = Timer::new(p.TIM3, &clocks).pwm_input(
35-
(pb4, pb5),
36-
&mut afio.mapr,
30+
let pwm_input = p.TIM3.pwm_input(
31+
(pb4, pb5, &mut afio.mapr),
3732
&mut dbg,
3833
Configuration::Frequency(10.kHz()),
34+
&clocks,
3935
);
4036

4137
loop {

‎examples/qei.rs

+4-2
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ use panic_semihosting as _;
99
use cortex_m_semihosting::hprintln;
1010

1111
use cortex_m_rt::entry;
12-
use stm32f1xx_hal::{pac, prelude::*, qei::QeiOptions, timer::Timer};
12+
use stm32f1xx_hal::{pac, prelude::*, qei::QeiOptions};
1313

1414
#[entry]
1515
fn main() -> ! {
@@ -38,7 +38,9 @@ fn main() -> ! {
3838
let c1 = gpiob.pb6;
3939
let c2 = gpiob.pb7;
4040

41-
let qei = Timer::new(dp.TIM4, &clocks).qei((c1, c2), &mut afio.mapr, QeiOptions::default());
41+
let qei = dp
42+
.TIM4
43+
.qei((c1, c2, &mut afio.mapr), QeiOptions::default(), &clocks);
4244
let mut delay = cp.SYST.delay(&clocks);
4345

4446
loop {

‎src/prelude.rs

+2
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,12 @@ pub use crate::gpio::GpioExt as _stm32_hal_gpio_GpioExt;
1313
pub use crate::hal_02::adc::OneShot as _embedded_hal_adc_OneShot;
1414
pub use crate::hal_02::prelude::*;
1515
pub use crate::i2c::I2cExt as _;
16+
pub use crate::qei::QeiExt as _;
1617
pub use crate::rcc::RccExt as _stm32_hal_rcc_RccExt;
1718
pub use crate::serial::SerialExt as _;
1819
pub use crate::spi::SpiExt as _;
1920
pub use crate::time::U32Ext as _stm32_hal_time_U32Ext;
21+
pub use crate::timer::pwm_input::PwmInputExt as _;
2022
#[cfg(feature = "rtic")]
2123
pub use crate::timer::MonoTimerExt as _stm32f4xx_hal_timer_MonoTimerExt;
2224
pub use crate::timer::PwmExt as _stm32f4xx_hal_timer_PwmExt;

‎src/qei.rs

+87-55
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,12 @@
44
NOTE: In some cases you need to specify remap you need, especially for TIM2
55
(see [Alternate function remapping](super::timer)):
66
*/
7-
use core::marker::PhantomData;
8-
97
use crate::pac;
108
use embedded_hal_02 as hal;
119
pub use hal::Direction;
1210

13-
use crate::afio::MAPR;
14-
15-
use crate::timer::pwm_input::Pins;
16-
use crate::timer::{pins::sealed::Remap, Timer};
11+
use crate::rcc::Clocks;
12+
use crate::timer::{InPins, InputPins, Timer};
1713

1814
/// SMS (Slave Mode Selection) register
1915
#[derive(Copy, Clone, Debug)]
@@ -60,90 +56,122 @@ impl Default for QeiOptions {
6056
}
6157
}
6258

63-
pub struct Qei<TIM, REMAP, PINS> {
59+
pub struct Qei<TIM: InputPins> {
6460
tim: TIM,
65-
pins: PINS,
66-
_remap: PhantomData<REMAP>,
61+
pins: (TIM::InCh1, TIM::InCh2),
62+
}
63+
64+
pub trait QeiExt: Sized + InputPins {
65+
fn qei(
66+
self,
67+
pins: impl Into<InPins<Self::InCh1, Self::InCh2>>,
68+
options: QeiOptions,
69+
clocks: &Clocks,
70+
) -> Qei<Self>;
6771
}
6872

6973
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
70-
impl Timer<pac::TIM1> {
71-
pub fn qei<REMAP, PINS>(
74+
impl QeiExt for pac::TIM1 {
75+
fn qei(
7276
self,
73-
pins: PINS,
74-
mapr: &mut MAPR,
77+
pins: impl Into<InPins<Self::InCh1, Self::InCh2>>,
7578
options: QeiOptions,
76-
) -> Qei<pac::TIM1, REMAP, PINS>
77-
where
78-
REMAP: Remap<Periph = pac::TIM1>,
79-
PINS: Pins<REMAP>,
80-
{
81-
mapr.modify_mapr(|_, w| unsafe { w.tim1_remap().bits(REMAP::REMAP) });
79+
clocks: &Clocks,
80+
) -> Qei<Self> {
81+
Timer::new(self, clocks).qei(pins, options)
82+
}
83+
}
8284

85+
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
86+
impl Timer<pac::TIM1> {
87+
pub fn qei(
88+
self,
89+
pins: impl Into<InPins<<pac::TIM1 as InputPins>::InCh1, <pac::TIM1 as InputPins>::InCh2>>,
90+
options: QeiOptions,
91+
) -> Qei<pac::TIM1> {
8392
let Self { tim, clk: _ } = self;
8493
Qei::_tim1(tim, pins, options)
8594
}
8695
}
8796

88-
impl Timer<pac::TIM2> {
89-
pub fn qei<REMAP, PINS>(
97+
impl QeiExt for pac::TIM2 {
98+
fn qei(
9099
self,
91-
pins: PINS,
92-
mapr: &mut MAPR,
100+
pins: impl Into<InPins<Self::InCh1, Self::InCh2>>,
93101
options: QeiOptions,
94-
) -> Qei<pac::TIM2, REMAP, PINS>
95-
where
96-
REMAP: Remap<Periph = pac::TIM2>,
97-
PINS: Pins<REMAP>,
98-
{
99-
mapr.modify_mapr(|_, w| unsafe { w.tim2_remap().bits(REMAP::REMAP) });
102+
clocks: &Clocks,
103+
) -> Qei<Self> {
104+
Timer::new(self, clocks).qei(pins, options)
105+
}
106+
}
100107

108+
impl Timer<pac::TIM2> {
109+
pub fn qei(
110+
self,
111+
pins: impl Into<InPins<<pac::TIM2 as InputPins>::InCh1, <pac::TIM2 as InputPins>::InCh2>>,
112+
options: QeiOptions,
113+
) -> Qei<pac::TIM2> {
101114
let Self { tim, clk: _ } = self;
102115
Qei::_tim2(tim, pins, options)
103116
}
104117
}
105118

106-
impl Timer<pac::TIM3> {
107-
pub fn qei<REMAP, PINS>(
119+
impl QeiExt for pac::TIM3 {
120+
fn qei(
108121
self,
109-
pins: PINS,
110-
mapr: &mut MAPR,
122+
pins: impl Into<InPins<Self::InCh1, Self::InCh2>>,
111123
options: QeiOptions,
112-
) -> Qei<pac::TIM3, REMAP, PINS>
113-
where
114-
REMAP: Remap<Periph = pac::TIM3>,
115-
PINS: Pins<REMAP>,
116-
{
117-
mapr.modify_mapr(|_, w| unsafe { w.tim3_remap().bits(REMAP::REMAP) });
124+
clocks: &Clocks,
125+
) -> Qei<Self> {
126+
Timer::new(self, clocks).qei(pins, options)
127+
}
128+
}
118129

130+
impl Timer<pac::TIM3> {
131+
pub fn qei(
132+
self,
133+
pins: impl Into<InPins<<pac::TIM3 as InputPins>::InCh1, <pac::TIM3 as InputPins>::InCh2>>,
134+
options: QeiOptions,
135+
) -> Qei<pac::TIM3> {
119136
let Self { tim, clk: _ } = self;
120137
Qei::_tim3(tim, pins, options)
121138
}
122139
}
123140

124141
#[cfg(feature = "medium")]
125-
impl Timer<pac::TIM4> {
126-
pub fn qei<REMAP, PINS>(
142+
impl QeiExt for pac::TIM4 {
143+
fn qei(
127144
self,
128-
pins: PINS,
129-
mapr: &mut MAPR,
145+
pins: impl Into<InPins<Self::InCh1, Self::InCh2>>,
130146
options: QeiOptions,
131-
) -> Qei<pac::TIM4, REMAP, PINS>
132-
where
133-
REMAP: Remap<Periph = pac::TIM4>,
134-
PINS: Pins<REMAP>,
135-
{
136-
mapr.modify_mapr(|_, w| w.tim4_remap().bit(REMAP::REMAP == 1));
147+
clocks: &Clocks,
148+
) -> Qei<Self> {
149+
Timer::new(self, &clocks).qei(pins, options)
150+
}
151+
}
137152

153+
#[cfg(feature = "medium")]
154+
impl Timer<pac::TIM4> {
155+
pub fn qei(
156+
self,
157+
pins: impl Into<InPins<<pac::TIM4 as InputPins>::InCh1, <pac::TIM4 as InputPins>::InCh2>>,
158+
options: QeiOptions,
159+
) -> Qei<pac::TIM4> {
138160
let Self { tim, clk: _ } = self;
139161
Qei::_tim4(tim, pins, options)
140162
}
141163
}
142164

143165
macro_rules! hal {
144166
($TIMX:ty: $timX:ident, $timXen:ident, $timXrst:ident) => {
145-
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
146-
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
167+
impl Qei<$TIMX> {
168+
fn $timX(
169+
tim: $TIMX,
170+
pins: impl Into<InPins<<$TIMX as InputPins>::InCh1, <$TIMX as InputPins>::InCh2>>,
171+
options: QeiOptions,
172+
) -> Self {
173+
let pins = pins.into();
174+
147175
// Configure TxC1 and TxC2 as captures
148176
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());
149177

@@ -163,17 +191,21 @@ macro_rules! hal {
163191

164192
Qei {
165193
tim,
166-
pins,
167-
_remap: PhantomData,
194+
pins: (pins.c1, pins.c2),
168195
}
169196
}
170197

171-
pub fn release(self) -> ($TIMX, PINS) {
198+
pub fn release(
199+
self,
200+
) -> (
201+
$TIMX,
202+
(<$TIMX as InputPins>::InCh1, <$TIMX as InputPins>::InCh2),
203+
) {
172204
(self.tim, self.pins)
173205
}
174206
}
175207

176-
impl<REMAP, PINS> hal::Qei for Qei<$TIMX, REMAP, PINS> {
208+
impl hal::Qei for Qei<$TIMX> {
177209
type Count = u16;
178210

179211
fn count(&self) -> u16 {

‎src/timer/hal_02.rs

+6-8
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ use fugit::{ExtU32, HertzU32 as Hertz, TimerDurationU32};
1111
use void::Void;
1212

1313
use super::{
14-
pins::sealed::Remap, pwm::Pins, Channel, Counter, CounterHz, Delay, Error, Instance, Pwm,
15-
PwmChannel, PwmHz, SysCounter, SysCounterHz, SysDelay, WithPwm,
14+
pwm::Pins, Channel, Counter, CounterHz, Delay, Error, Instance, Pwm, PwmChannel, PwmHz,
15+
SysCounter, SysCounterHz, SysDelay, WithPwm,
1616
};
1717

1818
impl DelayUs<u32> for SysDelay {
@@ -153,11 +153,10 @@ impl<TIM: Instance + WithPwm, const C: u8> embedded_hal_02::PwmPin for PwmChanne
153153
}
154154
}
155155

156-
impl<TIM, REMAP, P, PINS> embedded_hal_02::Pwm for PwmHz<TIM, REMAP, P, PINS>
156+
impl<TIM, PINS> embedded_hal_02::Pwm for PwmHz<TIM, PINS>
157157
where
158158
TIM: Instance + WithPwm,
159-
REMAP: Remap<Periph = TIM>,
160-
PINS: Pins<REMAP, P>,
159+
PINS: Pins<TIM>,
161160
{
162161
type Channel = Channel;
163162
type Duty = u16;
@@ -264,11 +263,10 @@ impl<TIM: Instance, const FREQ: u32> Cancel for Counter<TIM, FREQ> {
264263
}
265264
}
266265

267-
impl<TIM, REMAP, P, PINS, const FREQ: u32> embedded_hal_02::Pwm for Pwm<TIM, REMAP, P, PINS, FREQ>
266+
impl<TIM, PINS, const FREQ: u32> embedded_hal_02::Pwm for Pwm<TIM, PINS, FREQ>
268267
where
269268
TIM: Instance + WithPwm,
270-
REMAP: Remap<Periph = TIM>,
271-
PINS: Pins<REMAP, P>,
269+
PINS: Pins<TIM>,
272270
{
273271
type Channel = Channel;
274272
type Duty = u16;

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