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burrbullburrbull
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gpio update
1 parent 2852803 commit 80b4b79

16 files changed

+2040
-1100
lines changed

‎Cargo.toml

+32-24
Original file line numberDiff line numberDiff line change
@@ -72,46 +72,54 @@ unproven = ["embedded-hal/unproven"]
7272
otg_fs = ["synopsys-usb-otg"]
7373

7474
# L4x1
75-
stm32l431 = [ "stm32l4/stm32l4x1" ]
76-
stm32l451 = [ "stm32l4/stm32l4x1" ]
77-
stm32l471 = [ "stm32l4/stm32l4x1" ]
75+
stm32l431 = [ "stm32l4/stm32l4x1", "gpio-l43x" ]
76+
stm32l451 = [ "stm32l4/stm32l4x1", "gpio-l45x" ]
77+
stm32l471 = [ "stm32l4/stm32l4x1", "gpio-l47x" ]
7878

7979
# L412
80-
stm32l412 = [ "stm32l4/stm32l412" ]
81-
stm32l422 = [ "stm32l4/stm32l412" ]
80+
stm32l412 = [ "stm32l4/stm32l412", "gpio-l41x" ]
81+
stm32l422 = [ "stm32l4/stm32l412", "gpio-l41x" ]
8282

8383
# L4x2
84-
stm32l432 = [ "stm32l4/stm32l4x2" ]
85-
stm32l442 = [ "stm32l4/stm32l4x2" ]
86-
stm32l452 = [ "stm32l4/stm32l4x2" ]
87-
stm32l462 = [ "stm32l4/stm32l4x2" ]
84+
stm32l432 = [ "stm32l4/stm32l4x2", "gpio-l43x" ]
85+
stm32l442 = [ "stm32l4/stm32l4x2", "gpio-l43x" ]
86+
stm32l452 = [ "stm32l4/stm32l4x2", "gpio-l45x" ]
87+
stm32l462 = [ "stm32l4/stm32l4x2", "gpio-l45x" ]
8888

8989
# L4x3
90-
stm32l433 = [ "stm32l4/stm32l4x3" ]
91-
stm32l443 = [ "stm32l4/stm32l4x3" ]
90+
stm32l433 = [ "stm32l4/stm32l4x3", "gpio-l43x" ]
91+
stm32l443 = [ "stm32l4/stm32l4x3", "gpio-l43x" ]
9292

9393
# L4x5
94-
stm32l475 = [ "stm32l4/stm32l4x5" ]
94+
stm32l475 = [ "stm32l4/stm32l4x5", "gpio-l47x" ]
9595

9696
# L4x6
97-
stm32l476 = [ "stm32l4/stm32l4x6" ]
98-
stm32l486 = [ "stm32l4/stm32l4x6" ]
99-
stm32l496 = [ "stm32l4/stm32l4x6" ]
100-
stm32l4a6 = [ "stm32l4/stm32l4x6" ]
97+
stm32l476 = [ "stm32l4/stm32l4x6", "gpio-l47x" ]
98+
stm32l486 = [ "stm32l4/stm32l4x6", "gpio-l47x" ]
99+
stm32l496 = [ "stm32l4/stm32l4x6", "gpio-l49x" ]
100+
stm32l4a6 = [ "stm32l4/stm32l4x6", "gpio-l49x" ]
101101

102102
# L4+ series PAC support??
103-
#stm32l4p5 = [ "stm32l4/stm32l4x5" ]
104-
#stm32l4q5 = [ "stm32l4/stm32l4x5" ]
105-
#stm32l4r5 = [ "stm32l4/stm32l4x5" ]
106-
#stm32l4s5 = [ "stm32l4/stm32l4x5" ]
103+
#stm32l4p5 = [ "stm32l4/stm32l4x5", "gpio-l4p" ]
104+
#stm32l4q5 = [ "stm32l4/stm32l4x5", "gpio-l4p" ]
105+
#stm32l4r5 = [ "stm32l4/stm32l4x5", "gpio-l4rx" ]
106+
#stm32l4s5 = [ "stm32l4/stm32l4x5", "gpio-l4rx" ]
107107

108108
# L4x7
109-
#stm32l4r7 = [ "stm32l4/stm32l4x7" ]
110-
#stm32l4s7 = [ "stm32l4/stm32l4x7" ]
109+
#stm32l4r7 = [ "stm32l4/stm32l4x7", "gpio-l4rx" ]
110+
#stm32l4s7 = [ "stm32l4/stm32l4x7", "gpio-l4rx" ]
111111

112112
## L4x9
113-
stm32l4r9 = [ "stm32l4/stm32l4r9" ] # PAC has an L4r9 specific variation
114-
stm32l4s9 = [ "stm32l4/stm32l4r9" ]
113+
stm32l4r9 = [ "stm32l4/stm32l4r9", "gpio-l4rx" ] # PAC has an L4r9 specific variation
114+
stm32l4s9 = [ "stm32l4/stm32l4r9", "gpio-l4rx" ]
115+
116+
gpio-l41x = []
117+
gpio-l43x = []
118+
gpio-l45x = []
119+
gpio-l47x = []
120+
gpio-l49x = []
121+
#gpio-l4p = []
122+
gpio-l4rx = []
115123

116124
[dev-dependencies]
117125
panic-halt = "0.2.0"

‎examples/irq_button.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ extern crate panic_semihosting;
77
extern crate stm32l4xx_hal as hal;
88

99
use crate::hal::{
10-
gpio::{gpioc::PC13, Edge, ExtiPin, Input, PullUp},
10+
gpio::{gpioc::PC13, Edge, ExtiPin, Input},
1111
interrupt,
1212
prelude::*,
1313
stm32,
@@ -21,7 +21,7 @@ use cortex_m::{
2121
use rt::entry;
2222

2323
// Set up global state. It's all mutexed up for concurrency safety.
24-
static BUTTON: Mutex<RefCell<Option<PC13<Input<PullUp>>>>> = Mutex::new(RefCell::new(None));
24+
static BUTTON: Mutex<RefCell<Option<PC13<Input>>>> = Mutex::new(RefCell::new(None));
2525

2626
#[entry]
2727
fn main() -> ! {

‎examples/otg_fs_serial.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -96,11 +96,11 @@ unsafe fn main() -> ! {
9696
pin_dm: gpioa
9797
.pa11
9898
.into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh)
99-
.set_speed(Speed::VeryHigh),
99+
.speed(Speed::VeryHigh),
100100
pin_dp: gpioa
101101
.pa12
102102
.into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh)
103-
.set_speed(Speed::VeryHigh),
103+
.speed(Speed::VeryHigh),
104104
};
105105

106106
let usb_bus = UsbBus::new(usb, &mut EP_MEMORY);

‎examples/serial_vcom.rs

+15-15
Original file line numberDiff line numberDiff line change
@@ -27,33 +27,33 @@ fn main() -> ! {
2727
let mut rcc = p.RCC.constrain();
2828
let mut pwr = p.PWR.constrain(&mut rcc.apb1r1);
2929
// let mut gpioa = p.GPIOA.split(&mut rcc.ahb2);
30-
// let mut gpiob = p.GPIOB.split(&mut rcc.ahb2);
31-
let mut gpiod = p.GPIOD.split(&mut rcc.ahb2);
30+
let mut gpiob = p.GPIOB.split(&mut rcc.ahb2);
31+
// let mut gpiod = p.GPIOD.split(&mut rcc.ahb2);
3232

3333
// clock configuration using the default settings (all clocks run at 8 MHz)
3434
let clocks = rcc.cfgr.freeze(&mut flash.acr, &mut pwr);
3535
// TRY this alternate clock configuration (clocks run at nearly the maximum frequency)
3636
// let clocks = rcc.cfgr.sysclk(64.MHz()).pclk1(32.MHz()).freeze(&mut flash.acr);
3737

38-
//let tx = gpioa.pa2.into_af7(&mut gpioa.moder, &mut gpioa.afrl);
39-
// let tx = gpiob.pb6.into_af7(&mut gpiob.moder, &mut gpiob.afrl);
40-
let tx = gpiod
41-
.pd5
42-
.into_alternate(&mut gpiod.moder, &mut gpiod.otyper, &mut gpiod.afrl);
38+
// let tx = gpioa.pa2.into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl);
39+
let tx = gpiob
40+
.pb6
41+
.into_alternate(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrl);
42+
// let tx = gpiod.pd5.into_alternate(&mut gpiod.moder, &mut gpiod.otyper, &mut gpiod.afrl);
4343

44-
// let rx = gpioa.pa3.into_af7(&mut gpioa.moder, &mut gpioa.afrl);
45-
// let rx = gpiob.pb7.into_af7(&mut gpiob.moder, &mut gpiob.afrl);
46-
let rx = gpiod
47-
.pd6
48-
.into_alternate(&mut gpiod.moder, &mut gpiod.otyper, &mut gpiod.afrl);
44+
// let rx = gpioa.pa3.into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl);
45+
let rx = gpiob
46+
.pb7
47+
.into_alternate(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrl);
48+
// let rx = gpiod.pd6.into_alternate(&mut gpiod.moder, &mut gpiod.otyper, &mut gpiod.afrl);
4949

5050
// TRY using a different USART peripheral here
51-
let serial = Serial::usart2(
52-
p.USART2,
51+
let serial = Serial::usart1(
52+
p.USART1,
5353
(tx, rx),
5454
Config::default().baudrate(115_200.bps()),
5555
clocks,
56-
&mut rcc.apb1r1,
56+
&mut rcc.apb2,
5757
);
5858
let (mut tx, mut rx) = serial.split();
5959

‎examples/spi_dma_rxtx.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -47,15 +47,15 @@ const APP: () = {
4747
let sck = gpiob
4848
.pb3
4949
.into_alternate(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrl)
50-
.set_speed(Speed::High);
50+
.speed(Speed::High);
5151
let miso = gpiob
5252
.pb4
5353
.into_alternate(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrl)
54-
.set_speed(Speed::High);
54+
.speed(Speed::High);
5555
let mosi = gpiob
5656
.pb5
5757
.into_alternate(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrl)
58-
.set_speed(Speed::High);
58+
.speed(Speed::High);
5959
let mut dummy_cs = gpiob.pb6.into_push_pull_output_in_state(
6060
&mut gpiob.moder,
6161
&mut gpiob.otyper,

‎src/can.rs

+6-9
Original file line numberDiff line numberDiff line change
@@ -20,34 +20,31 @@ pub trait Pins: sealed::Sealed {
2020
macro_rules! pins {
2121
($($PER:ident => ($tx:ident<$txaf:literal>, $rx:ident<$rxaf:literal>),)+) => {
2222
$(
23-
impl crate::can::sealed::Sealed for ($tx<crate::gpio::Alternate<$txaf>>, $rx<crate::gpio::Alternate<$rxaf>>) {}
24-
impl crate::can::Pins for ($tx<crate::gpio::Alternate<$txaf>>, $rx<crate::gpio::Alternate<$rxaf>>) {
23+
impl crate::can::sealed::Sealed for (crate::gpio::$tx<crate::gpio::Alternate<$txaf>>, crate::gpio::$rx<crate::gpio::Alternate<$rxaf>>) {}
24+
impl crate::can::Pins for (crate::gpio::$tx<crate::gpio::Alternate<$txaf>>, crate::gpio::$rx<crate::gpio::Alternate<$rxaf>>) {
2525
type Instance = $PER;
2626
}
2727
)+
2828
}
2929
}
3030

3131
mod common_pins {
32-
use crate::gpio::{
33-
gpioa::{PA11, PA12},
34-
gpiob::{PB8, PB9},
35-
gpiod::{PD0, PD1},
36-
};
3732
use crate::pac::CAN1;
3833

3934
// All STM32L4 models with CAN support these pins
4035
pins! {
4136
CAN1 => (PA12<9>, PA11<9>),
42-
CAN1 => (PD1<9>, PD0<9>),
4337
CAN1 => (PB9<9>, PB8<9>),
4438
}
39+
#[cfg(not(any(feature = "gpio-l41x")))]
40+
pins! {
41+
CAN1 => (PD1<9>, PD0<9>),
42+
}
4543
}
4644

4745
// L4x1
4846
#[cfg(any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471"))]
4947
mod pb13_pb12_af10 {
50-
use crate::gpio::gpiob::{PB12, PB13};
5148
use crate::pac::CAN1;
5249
pins! { CAN1 => (PB13<10>, PB12<10>), }
5350
}

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