|
| 1 | +**Uart8Receiver** |
| 2 | + |
| 3 | +| Code location | Test # | |
| 4 | +| :------------------------------------------------------------| :-------------| |
| 5 | +| 79 if (out_hold_count == 5'b10000) begin | 12, 25, 27 | |
| 6 | +| 110 if (en && err && !in_sample) begin | 30 | |
| 7 | +| 133 if (sample_count == 4'b0) begin | 1, 16 | |
| 8 | +| 134 if (&in_prior_hold_reg \|\| done && !err) begin | 1, 16, 24, 28 | |
| 9 | +| 141 end else begin | 17, 18, 24 | |
| 10 | +| 148 if (sample_count == 4'b1100) begin | 1, 16 | |
| 11 | +| 158 end else if (\|sample_count) begin | 18, 19 | |
| 12 | +| 215 if (sample_count[3]) begin | 20, 21, 22 | |
| 13 | +| 216 if (!in_sample) begin | 21*, 22* | |
| 14 | +| 220 if (sample_count == 4'b1000 && &in_prior_hold_reg) begin | 25 | |
| 15 | +| 228 end else if (&sample_count) begin | 23 | |
| 16 | +| 238 if (&in_current_hold_reg) begin | 1, 20, 21 | |
| 17 | +| 244 end else if (&sample_count) begin | 5**, 22 | |
| 18 | +| 261 if (!err && !in_sample \|\| &sample_count) begin | 27 | |
| 19 | +| 269 if (in_sample) begin | 1, 9, 28 | |
| 20 | +| 274 end else begin [case: !in_sample] | | |
| 21 | +| 282 end else begin [case: !&sample_count] | 12 | |
| 22 | +| 290 end else if (&sample_count[3:1]) begin | 30 | |
| 23 | + |
| 24 | +<br /> |
| 25 | + |
| 26 | +**Uart8Transmitter** |
| 27 | + |
| 28 | +| Code location | Test # | |
| 29 | +| :----------------------------------------| :-------------| |
| 30 | +| 84 if (start) begin | 1, 6, 7, 8, 9 | |
| 31 | +| 115 if (start) begin | 9, 12 | |
| 32 | +| 116 if (done == 1'b0) begin | 9, 12 | |
| 33 | +| 118 if (TURBO_FRAMES) begin | 12 | |
| 34 | +| 120 end else begin [case: !TURBO_FRAMES] | 9, 13 | |
| 35 | +| 123 end else begin [case: done == 1'b1] | 9, 13 | |
| 36 | +| 127 end else begin [case: !start] | 1, 4 | |
| 37 | + |
| 38 | +<br /> |
| 39 | + |
| 40 | +\* With no meeting the inner conditions lines 220 and 228 |
| 41 | +\*\* See second transaction |
0 commit comments