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Serial half-duplex #781

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c4c0ef1
half-duplex init
burrbull Jul 25, 2024
cbf1542
half-duplex isr
burrbull Jul 28, 2024
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24 changes: 24 additions & 0 deletions src/serial.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -195,6 +195,12 @@ pub struct Tx<USART: CommonPins, WORD = u8> {
pin: USART::Tx<PushPull>,
}

pub struct HalfDuplex<USART: CommonPins, WORD = u8> {
_word: PhantomData<WORD>,
usart: USART,
pin: USART::Tx<PushPull>,
}

pub trait SerialExt: Sized + Instance {
fn serial<WORD>(
self,
Expand All @@ -203,6 +209,13 @@ pub trait SerialExt: Sized + Instance {
clocks: &Clocks,
) -> Result<Serial<Self, WORD>, config::InvalidConfig>;

fn half_duplex<WORD>(
self,
tx_pin: impl Into<Self::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<HalfDuplex<Self, WORD>, config::InvalidConfig>;

fn tx<WORD>(
self,
tx_pin: impl Into<Self::Tx<PushPull>>,
Expand Down Expand Up @@ -244,6 +257,17 @@ impl<USART: Instance, WORD> Serial<USART, WORD> {
}
}

impl<USART: Instance, WORD> HalfDuplex<USART, WORD> {
pub fn new(
usart: USART,
tx_pin: impl Into<USART::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<Self, config::InvalidConfig> {
<USART as crate::Ptr>::RB::half_duplex(usart, tx_pin, config, clocks)
}
}

impl<UART: CommonPins, WORD> Serial<UART, WORD> {
pub fn split(self) -> (Tx<UART, WORD>, Rx<UART, WORD>) {
(self.tx, self.rx)
Expand Down
127 changes: 126 additions & 1 deletion src/serial/uart_impls.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,8 @@ use enumflags2::BitFlags;
use nb::block;

use super::{
config, CFlag, Error, Event, Flag, Rx, RxISR, RxListen, Serial, SerialExt, Tx, TxISR, TxListen,
config, CFlag, Error, Event, Flag, HalfDuplex, Rx, RxISR, RxListen, Serial, SerialExt, Tx,
TxISR, TxListen,
};
use crate::dma::{
traits::{DMASet, PeriAddress},
Expand Down Expand Up @@ -50,6 +51,13 @@ pub trait RegisterBlockImpl: crate::Sealed {
clocks: &Clocks,
) -> Result<Serial<UART, WORD>, config::InvalidConfig>;

fn half_duplex<UART: Instance + crate::Ptr<RB = Self>, WORD>(
uart: UART,
pins: impl Into<UART::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<HalfDuplex<UART, WORD>, config::InvalidConfig>;

fn read_u16(&self) -> nb::Result<u16, Error>;
fn write_u16(&self, word: u16) -> nb::Result<(), Error>;

Expand Down Expand Up @@ -153,6 +161,55 @@ pub trait RegisterBlockImpl: crate::Sealed {

macro_rules! uartCommon {
() => {
fn half_duplex<UART: Instance + crate::Ptr<RB = Self>, WORD>(
uart: UART,
tx_pin: impl Into<UART::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<HalfDuplex<UART, WORD>, config::InvalidConfig> {
use self::config::*;

let config = config.into();
unsafe {
// Enable clock.
UART::enable_unchecked();
UART::reset_unchecked();
}

let pclk_freq = UART::clock(clocks).raw();
let baud = config.baudrate.0;

let (over8, div) = Self::calculate_brr(pclk_freq, baud)?;

uart.brr().write(|w| unsafe { w.bits(div) });

// Reset other registers to disable advanced USART features
uart.cr2().reset();

uart.cr3().write(|w| w.hdsel().half_duplex());

// Enable transmission and receiving
// and configure frame

uart.cr1().write(|w| {
w.ue().set_bit();
w.over8().bit(over8);
w.te().set_bit();
w.re().set_bit();
w.m().bit(config.wordlength == WordLength::DataBits9);
w.pce().bit(config.parity != Parity::ParityNone);
w.ps().bit(config.parity == Parity::ParityOdd)
});

let serial = HalfDuplex {
_word: core::marker::PhantomData,
usart: uart,
pin: tx_pin.into(),
};
serial.usart.set_stopbits(config.stopbits);
Ok(serial)
}

fn read_u16(&self) -> nb::Result<u16, Error> {
// NOTE(unsafe) atomic read with no side effects
let sr = self.sr().read();
Expand Down Expand Up @@ -577,6 +634,65 @@ impl<UART: Instance, WORD> crate::Listen for Serial<UART, WORD> {
}
}

impl<UART: Instance, WORD> RxISR for HalfDuplex<UART, WORD> {
fn is_idle(&self) -> bool {
self.usart.is_idle()
}

fn is_rx_not_empty(&self) -> bool {
self.usart.is_rx_not_empty()
}

/// This clears `Idle`, `Overrun`, `Noise`, `FrameError` and `ParityError` flags
fn clear_idle_interrupt(&self) {
self.usart.clear_idle_interrupt();
}
}

impl<UART: Instance, WORD> TxISR for HalfDuplex<UART, WORD> {
fn is_tx_empty(&self) -> bool {
self.usart.is_tx_empty()
}
}

impl<UART: Instance, WORD> crate::ClearFlags for HalfDuplex<UART, WORD> {
type Flag = CFlag;

#[inline(always)]
fn clear_flags(&mut self, flags: impl Into<BitFlags<Self::Flag>>) {
self.usart.clear_flags(flags.into())
}
}

impl<UART: Instance, WORD> crate::ReadFlags for HalfDuplex<UART, WORD> {
type Flag = Flag;

#[inline(always)]
fn flags(&self) -> BitFlags<Self::Flag> {
self.usart.flags()
}
}

impl<UART: Instance, WORD> crate::Listen for HalfDuplex<UART, WORD> {
type Event = Event;

#[inline(always)]
fn listen(&mut self, event: impl Into<BitFlags<Event>>) {
self.usart.listen_event(None, Some(event.into()));
}

#[inline(always)]
fn listen_only(&mut self, event: impl Into<BitFlags<Self::Event>>) {
self.usart
.listen_event(Some(BitFlags::ALL), Some(event.into()));
}

#[inline(always)]
fn unlisten(&mut self, event: impl Into<BitFlags<Event>>) {
self.usart.listen_event(Some(event.into()), None);
}
}

impl<UART: Instance> fmt::Write for Serial<UART>
where
Tx<UART>: fmt::Write,
Expand All @@ -603,6 +719,15 @@ impl<UART: Instance> SerialExt for UART {
) -> Result<Serial<Self, WORD>, config::InvalidConfig> {
Serial::new(self, pins, config, clocks)
}

fn half_duplex<WORD>(
self,
tx_pin: impl Into<Self::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<HalfDuplex<Self, WORD>, config::InvalidConfig> {
HalfDuplex::new(self, tx_pin, config, clocks)
}
}

impl<UART: Instance, WORD> Serial<UART, WORD> {
Expand Down
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